Power is a critical constraint in the design of embedded applications. For example, in the world of portable electronics, one of the key concerns for consumers is the time they can operate their devices on battery power. Therefore, a top priority in the portable electronics industry is designing low power devices. To support this endeavor, various techniques for measuring the power consumption of these applications have been developed. Many of these techniques focus solely on the hardware components of the application and ignore the impact of the software components on the overall power consumption.
Software impacts power consumption at various design levels. At the highest level, the partitioning of application functionality between hardware and software has implications on total power consumption. The choice of algorithm and other higher-level design decisions for the software components also affect system power consumption. The choice of programming language constructs in implementing the design also affects the power cost of the software.
Some techniques, with varying levels of effectiveness, have been developed to analyze power consumption from the software perspective. For example, some estimation techniques are based on architectural level analysis of the processor. Power costs are assigned to architectural components such as datapath execution units, control units, and memory elements. Then, the power cost of a hardware module is determined by the estimated average capacitance that would switch when the module is activated based on a statistical power model. Activity factors for the modules are obtained from functional simulation over typical input streams. Power costs are assigned to individual modules, in isolation from one another, ignoring the correlations between the activities of different modules during execution of real programs.
In another technique, power analysis is done at the instruction level. In this type of analysis, power models of programs are created from a set of base costs for the instructions in the processor instruction set and the power costs of inter-instruction effects such as stalls and cache misses. These models require the generation of the base instruction costs and the inter-instruction effects on a processor-by-processor basis and their accuracy is limited by the accuracy in determining the impact of the dynamic behavior of an application.
In addition to these model-based techniques, some methods for measuring power consumption during actual execution of the embedded application at varying levels of granularity have been developed. In one method, the power consumption of a selected single range of instructions can be measured. In another, the power consumption of selected functions can be measured but the application is halted after each function is executed.